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3G Layer 1 development
Key Technologies : RTL Design, 3G.
Abstract:
This project was to develop a baseband receiver using TI C64X DSP and Xilinx FPGA. HSC developed the front end receiver algorithms including rake receiver. To test this HSC developed the UT simulator apart from test vectors generated through MATLAB. Finally to meet the requirement of number of users and throughput HSC also incorporated optimizations in FPGA and DSP.
Customer Benefits:
Provided reusable components for FPGA.
System engineers helped with smooth integration
HSC provided DSP, FPGA, System, Algorithms so that the customer could treat HSC as a one stop shop and not have to mediate between multiple customers.
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